description guaranteed ac parameters over temperature: ? max > 3.0ghz (sy55851a) ? r /t f < 100ps propagation delay < 280ps guaranteed operation over ?0 c to +85 c temperature range wide supply voltage range: 2.3v to 3.6v single ic provides 8 logic functions 2:1 mux capability fully differential i/o source terminated cml outputs for fast edge rates: sy55851 for 100 ? load sy55851a for 50 ? load guaranteed matched propagation delays: select (s)-to-out: < 280ps input (a and b)-to-out: < 280ps accepts pecl, lvpecl, cml input signals functions as a pecl/lvpecl-to-cml translator available in a 10-pin (3mm 3mm) msop package the sy55851 and sy55851a are highly flexible, universal logic gates capable of up to 3.0ghz operation (sy55851a). these anygate differential logic devices will produce all possible logic functions of two boolean variables. they can be configured as any of the following gates: and, nand, or, nor, xor, xnor, delay, negation (not). the sy55851 and sy55851a can also function as a 2-input multiplexer. the sy55851 has an output stage optimized for 100 ? loads, and the sy55851a is optimized for 50 ? loads. the differential inputs for both devices are normally terminated with a single resistor (100 ? ) between the true and complement pins. features 2.5v/3v, 3.0ghz cml anygate any logic w/50 ? or 100 ? outputs superlite sy55851 sy55851a final applications port bypass data communication systems wireless communication systems telecom systems pin configuration functional block diagram 1 rev.: a amendment: /2 issue date: october 2001 s 0 1 a b s q 2 2 2 2 pin names pin function a, /a cml, pecl, lvpecl input b, /b cml, pecl, lvpecl input q, /q differential cml output s, /s cml, pecl, lvpecl input selector gnd ground v cc v cc anygate and superlite are trademarks of micrel, inc. 1 s /s a /a gnd 10 vcc /b b q /q 9 8 7 6 2 3 4 5 msop sy55851 and sy55851a
2 superlite sy55851 sy55851a micrel pin descriptions a, /a cml input (differential) this is one of the differential inputs to the logic block. for a 2-variable logic function, it is either a constant value or a boolean input. for a 2-input mux, this signal represents the output when s is set to logic zero. b, /b cml input (differential) this is one of the differential inputs to the logic block. for a 2-variable logic function, it is either a constant value or a boolean input. for a 2-input mux, this signal represents the output when s is set to logic one. q, /q cml output (differential) this is the differential cml output for the logic block. for termination guidelines, see figure 3 . s, /s cml input (differential) this differential cml input is one of the inputs to the logic block. it represents either one boolean input for a 2-variable logic function, or the select input for a 2-input mux. functional description v cc nc input /input figure 1. hard wiring a logic 1 (1) nc for v cc > 3.0v applications nc input /input nc for v cc < 3.0v applications vcc input /input figure 2. hard wiring a logic 0 (1) establishing static logic inputs the true pin of an input pair is internally biased to ground through a 75k ? resistor. the complement pin of an input pair is internally biased to v cc /2 through an internal voltage divider consisting of two 75k ? resistors. since some logic functions necessitate an output to be connected to two inputs, sy55851/a inputs have no internal terminations. typically, one resistor between the true and complement input is all that is required, as per figure 3 . to keep an note: 1. input is either a, b, s input, and /input is either /a, /b, /s input. input at static logic zero at v cc 3.0v, leave both inputs unconnected or tie the complement input to v cc . for v cc < 3.0v applications, connect the complement input to v cc and leave the true input unconnected. to make an input static logic one, connect the true input to v cc , and leave the complement input unconnected. these are the only safe ways to cause inputs to be at a static value. in particular, no input pin should be directly connected to ground. all nc (no connect) pins should be unconnected.
3 superlite sy55851 sy55851a micrel |() abs q /q lhl l h lhhh l hll h l hlh l h | + ( + ) abs q /q lhl l h hhl h l lhhh l hhh h l abs q /q lxl l h hxl h l truth tables and/nand q /q s /s a /a b /b nc ? ( ? ) v cc or/nor q /q s /s a /a b /b + ( + ) v cc nc xor/xnor q /q s /s a /a b /b ( ) delay/negation q /q s a /b /s b /a nc v cc || abs q /q xlhl h xhhh l q /q s a /b /s b /a v cc nc |?(?) abs q /q lll l h lhl l h llhl h lhhh l q s a b 0 1 sq hb la 2:1 mux
4 superlite sy55851 sy55851a micrel cml termination and ttl interface all inputs accept the output from any other member of this family. all outputs are source terminated 100 ? or 50 ? cml differential drivers as shown in figure 3. all inputs to the sy55851/a must be externally terminated. sy55851/a inputs are designed to accept a termination resistor between the true and complement inputs of a differential pair. 0402 form factor chip resistors will fit with some trace fanout. 100 ? 100 ? 200 ? sy55851 v cc 8ma 100 ? 100 ? q /q figure 3a. sy55851 100 ? load cml output 50 ? 50 ? sy55851a 100 ? 50 ? 50 ? 16ma q /q v cc figure 3b. differentially terminated sy55851a (50 ? load cml output) 100 ? 100 ? 100 ? 100 ? sy55851 100 ? 50 ? 50 ? 8ma q /q v cc v cc figure 3c. differentially terminated sy55851 (50 ? load cml output) v cc v cc sy55851 sy55851a 1.47k 549 ? s /s v cc 1k 1k ttl driver v cc v cc (ttl driver) figure 4. interfacing ttl-to-cml select inputs
5 superlite sy55851 sy55851a micrel symbol rating value unit v cc power supply voltage ?.5 to +6.0 v v in input voltage ?.5 to v cc +0.5 v v out cml output voltage v cc ?.0 to v cc +0.5 v t a operating temperature range ?0 to +85 c t store storage temperature range ?5 to +150 c ja package thermal resistance ?till-air (multi-layer pcb) 113 c/w (junction-to-ambient) ?00lfpm (multi-layer pcb) 96 c/w jc package thermal resistance 42 c/w (junction-to-case) absolute maximum ratings (1) note: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional oper ation is not implied at conditions other than those detailed in the operational sections of this data sheet. exposure to absolute maximum ratlng co nditions for extended periods may affect device reliability. symbol parameter min. typ. max. unit condition v id differential input voltage 100 mv v ih input high voltage 1.6 v cc v v il input low voltage 1.5 v cc ?0.1 v v oh output high voltage v cc ?0.040 v cc ?0.010 v cc v no load v ol output low voltage v cc ?1.00 v cc ?0.800 v cc ?0.65 v no load v out output voltage swing (2) 0.650 0.800 1.00 v no load sy55851 0.400 v 100 ? load (3) 0.200 v 50 ? load (4) (sy55851) sy55851a 0.400 v 50 ? load (5) (sy55851a) r out output source impedance sy55851 80 100 120 ? sy55851a 40 50 60 ? cml dc electrical characteristics v cc = 2.3v to 3.6v; gnd = 0v; t a = ?0 c to +85 c (1) notes: 1. the dc parameters are guaranteed after thermal equilibrium has been established. 2. actual voltage levels and differential swing will depend on customer termination scheme. refer to the ?ml termination?diagr am for more details. 3. applies to sy55851: 200 ? termination resistor across q and /q. see figure 3a . 4. applies to the sy55851. see figure 3c . 5. applies to the sy55851a: 100 ? termination resistor across q and /q. see figure 3b . symbol parameter min. typ. max. unit condition v cc power supply voltage 2.3 3.6 v i cc power supply current sy55851 40 ma no load sy55851a 46 60 ma no load dc electrical characteristics t a = ?0 c to +85 c (1)
6 superlite sy55851 sy55851a micrel symbol parameter min. typ. max. unit condition f max (2) max. operating frequency sy55851 2.5 ghz sy55851a 3.0 ghz t pd(s-q) propagation delay (s to q) sy55851 350 ps sy55851a 130 280 ps t pd propagation delay (a-q and b-q) (a-q and b-q) sy55851 350 ps sy55851a 130 280 ps t r cml output rise/fall times t f (20% to 80%) sy55851 110 ps sy55851a 65 100 ps ac electrical characteristics (1) v cc = 2.3v to 3.6v; gnd = 0v; t a = ?0 c to +85 c notes: 1. sy55851: outputs terminated to 50 ? equivalent load. see figure 3c . sy55851a: outputs terminated to 50 ? load. see figure 3b 2. f max represents a maximum toggle rate in which the output still meets cml logic swing. product ordering code ordering package operating package code type range marking description sy55851uki k10-1 industrial 851u 100 ? load sy55851ukitr* k10-1 industrial 851u 100 ? load sy55851auki k10-1 industrial 851a 50 ? load sy55851aukitr* k10-1 industrial 851a 50 ? load *tape and reel.
7 superlite sy55851 sy55851a micrel 10 lead msop (k10-1) rev. 00 micrel-synergy 3250 scott boulevard santa clara ca 95054 usa tel + 1 (408) 980-9191 fax + 1 (408) 914-7878 web http://www.synergysemi.com http://www.micrel.com this information is believed to be accurate and reliable, however no responsibility is assumed by micrel for its use nor for an y infringement of patents or other rights of third parties resulting from its use. no license is granted by implication or otherwise under any patent or pat ent right of micrel inc. ? 2001 micrel incorporated
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